A BICS Design to Detect Soft Error in CMOS SRAM

This paper presents a Built In Current Sensor (BICS) design to detect soft error under both standby and operating condition in Complementary Metal Oxide Semiconductor (CMOS) Static Random Access Memory (SRAM). BICS connected in each column of SRAM cell array detects various values of current signal generated by particle strike. The generated current value is then compared with the reference value. An error signal is generated when it exceeds the reference value. The existing Built In Current Sensors are used to detect the soft error only at the time of standby condition. But there is a possibility of occurrence of soft error during operation conditions also. During write operation, the soft error occurs at the time of end of the write cycle. But in read operation the error can occur at any instant of time. Hence a BICS is designed in such a way that it can monitor the occurrence of soft error at any time instant of the operating condition as well as stand by condition. Keywors BICS; soft error; SRAM;